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timer digital To create a realtime timer, realtime microcontroller is not required (RTC). You only need a crystal and a timer prescale settings. for example, if used for 8MHz crystal, then choose the timer prescale of 8. Prescale is a divisor which will be conditional on crystal beats as needed. timer frequency = frequency of crystal / prescale so, timer frequency = 1MHz since T = 1 / F, then T = 1US This means that every single wave oscillation takes 1US. To simplify the calculation, the timer0 registers (TCNT0) shall be 155. TCNT0 then oscillates between 155 to 255. so that any overflow occurs, the timer has counted 100us. when made variable “x” to be in increments of each of the Overflow occurs when x = 10, the timer value is 1ms. and if each x = 10 will raise the value of variable “y”, then “y” is the timer value in ms. (In experiments conducted used ATMega8535 with 8MHz crystal).

ATmega8535 provides the ADC with a resolution of 10 bits. ADC is connected to 8 channel Analog Multiplexer which allows formed eight single-ended input voltage is ADC0 to ADC7. Can also be configured into seven differential input channels with ADC1 as the common terminal and the other negative as a positive voltage input. Or a second differential input channels with a choice reinforcement (gain) 10x or 200x, ie ADC1, ADC0 and ADC3, ADC2. the use of ADC atmega8535 ADC has an analog supply voltage pin separate AVCC. AVCC voltage is ± 0.3V of VCC.

potentiometer as a sensor of water level elevation When the water level changes, the float will drop following the water level.this causes the potentiometer rotates.This system is designed to detect water levels from 0 to 10m.when the water level is 0 meters, then the potentiometer resistance is minimal (0 ohms) and maximum (10 kohm) when the water level = 10 m. Changes in these constraints will lead to changes in the potentiometer output voltage.so that, if used linear potentiometer type, then the water level changes will be proportional to the potentiometer output voltage.to be more accurate, use an amplifier to strengthen this voltage and then processed by a microcontroller. The use of a potentiometer for controlling the position is quite practical because it requires only one excitation voltage and usually does not require complicated signal processing.Use of potentiometers in particular weaknesses are: Rapid wear due to friction Noise, especially when changing position and when there is loose contact Susceptible to corrosion Sensitive to impurities linear potentiometer as a sensor

All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports. This means that the direction of one port pin can be changed without unintentionally changing the direction of any other pin with the SBI and CBI instructions. The same applies when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as input). Each output buffer has symmetrical drive characteristics with both high sink and source capability. The pin driver is strong enough to drive LED displays directly. All port pins have individually selectable pull-up resistors with a supply-voltage invariant resistance. All I/O pins have protection diodes to both VCC and Ground as indicated in Figure. input and output port in avr atmega 8535 All registers and bit references in this section are written in general form. A lower case “x” represents the numbering letter for the port, and a lower case “n” represents the bit number. However, when using the register or bit defines in a program, the precise form must be used. For example, PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Registers and bit locations are listed in “Register Description for I/O-Ports” on page 63. Three I/O memory address locations are allocated for each port, one each for the Data Register – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins I/O location is read only, while the Data Register and the Data Direction Register are read/write. In addition, the Pull-up Disable – PUD bit in SFIOR disables the pull-up function for all pins in all ports when set. Most port pins are multiplexed with alternate functions for the peripheral features on the device. How each alternate function interferes with the port pin is described in “Alternate Port Functions”. Refer to the individual module sections for a full description of the alternate functions. Note that enabling the alternate function of some of the port pins does not affect the use of the other pins in the port as general digital I/O. General Digital Input-output Each port pin consists of three register bits: DDxn, PORTxn, and PINxn. As shown in “Register Description for I/O-Ports” on page 63, the DDxn bits are accessed at the DDRx I/O address, the PORTxn bits at the PORTx I/O address, and the PINxn bits at the PINx I/O address. The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written logic one, Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as an input pin. If PORTxn is written a logic one when the pin is configured as an input pin, the pull-up resistor is activated. To switch the pull-up resistor off, PORTxn has to be written logic zero or the pin has to be configured as an output pin. The port pins are tri-stated when a reset condition becomes active, even if no clocks are running. If PORTxn is written a logic one when the pin is configured as an output pin, the port pin is driven high (one). If PORTxn is written a logic zero when the pin is configured as an output pin, the port pin is driven low (zero). When switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn, PORTxn} = 0b11), an intermediate state with either pull-up enabled ({DDxn, PORTxn} = 0b01) or output low ({DDxn, PORTxn} = 0b10) must occur. Normally, the pull-up enabled state is fully acceptable, as a high-impedant environment will not notice the difference between a strong high driver and a pull-up. If this is not the case, the PUD bit in the SFIOR Register can be set to disable all pull-ups in all ports. Switching between input with pull-up and output low generates the same problem. The user must use either the tri-state ({DDxn, PORTxn} = 0b00) or the output high state ({DDxn, PORTxn} = 0b10) as an intermediate step.